Foxboro CALCA Logic Simulator

Paste a native Foxboro logic block program (RPN, as exported by the Logic Block Editor) and the simulator parses it, draws the logic diagram automatically, and traces live Boolean signals through every inverter, timer, and gate. Toggle the field inputs to watch the logic propagate.

Under Construction. Supports the boolean/timer/stack subset — CST, IN, OUT, NOT, AND n, OR n, NAND n, NOR n, XOR n, DON, DOFF, TIM, DUP, POP, END. Unsupported HLBL instructions report a clear error instead of drawing something wrong. Timers are simulated: press Run and a delay block counts real seconds (run at 20× or 60× so a 60 s delay is watchable).

Auto-Generated Logic Diagram

t = 0.0 s
● Active (1) ● Inactive (0)

Logic Program

One instruction per line. ; starts a comment.

Field Inputs

Try This

  • Interlock trip: toggle BI06 — the wire into the 5-input AND turns red and BO01 drops to 0.
  • Timer: turn BI04 on and press Run — the bar inside the DON block fills, and only after 60 s of simulated time does its output rise and BO02 drop.
  • Pump status: toggle BI04 back off — the DON resets instantly and BO02 returns to 1.
  • Edit the program: change AND 5 to AND 2 and press Generate — the diagram is re-laid out and inputs are re-discovered from the text.